1. Field
The present invention is related to on-chip passive devices, such as on-chip inductors.
2. Related Art
Demand for reduced size, high performance, lower power, and lower cost semiconductor products are factors that have driven the industry trend to move many off-chip passive devices to now be integrated on-chip. An example passive device is an inductor. The inductor is a key passive element in circuit applications, such as voltage controlled oscillators, low noise amplifiers, mixers and power amplifiers.
For an inductor, impedance goes up with frequency. It behaves as a short circuit at low frequencies and as an open circuit at high frequencies. An important benchmark of a good inductor is the quality factor (Q), which is equal to the ratio of a center frequency to a bandwidth of the inductor. It is a measure of the “quality” of a resonant system. Systems with a high Q factor resonate with a greater amplitude (at the resonant frequency) than systems with a low Q factor.
On-chip inductors are usually implemented by spiral structures fabricated on metal layers. The inductors can have different shapes, such as square, circular, or octagonal, they can be symmetric or non-symmetric, and/or they can be implemented with a single metal layer or multiple metal layers. To form these on-chip inductors, existing metal interconnect layers are used in a concentric ring-type structure to maximize inductance. The metal layers are also used for signal routing or power bussing.
The Q factor for an inductor increases the further it is placed from a substrate on which the chip is formed. A key factor that limits the construction of inductors using a top metal layer of the chip is the necessity to insulate the top metal layer of the chip from the outside environment (i.e., moisture, salt, scratch, etc) through films such as silicon nitride. To meet performance targets for the inductor, it may be necessary to add more mask layers to add additional layers of metal to increase the Q factor. However, the additional metal layers will substantially add cost to the final product (e.g., 6-7% of the overall “cost” of the product per additional metal layer).
Therefore, what is needed is a system and method that enhance inductor Q factor within existing processing steps of a chip, without adding “cost” to the overall chip.
The present invention will now be described with reference to the accompanying drawings. In the drawings, like reference numbers may indicate identical or functionally similar elements. Additionally, the left-most digit(s) of a reference number may identify the drawing in which the reference number first appears.